VLSI LAB

Approx. Rs 10,500 / PieceGet Latest Price

     After revision of stand alone, low cost, vendor dependant FPGA-CPLD trainer system, has come up Universal programmable logic development system with a modular architecture in the industry-standard factor. It is a power full hardwae development system that delivers the flexibility and easy-of-use necessary for rapid prototype development and multivendor & multitechnology support. The universal concept provides support for all Altera/Xilinx/Atmel/Actel/Lattice/Cypress ect. Devices available in the 144-pin TQPF package, 208-pin PWFP and PLCC packages.

FEATURES: 

1. Supports stand-alone or embadded operation.
2. Accommodates 1.8V,2.5V,3.3V and 5V devices.
3. Configuration via Passive serial, Join Test Action Group(JTAG).
4. Up to 140 user definable input output pins available.
5. Wide range of applications specific interfacing modules.
6. Microcontroller interface facility.
7. Auto device detection and identification facility.
8. More than 30 experiments with circuit diagram to experience with VHDL and Verilog Programming.
9. Demonstration/Evalution sample with user friendly manual.
10. Low cost and fast delivery.

• Provided different clock frequencies (2,10 and 16MHz) and upgradeable up to 66MHz.
• On board different supply levels generated to match multi volt FPGA /CPLD devices (1.8V, 3.3V and 5V).
• Female Dual line connecter 4Nos provided for piggy back connection of FPGA/CPLD devices.
• FPGA/CPLD of different makes XILINX/ALTERa/ATMEL/ACTEL/LATTICE etc.
• FPGA/CPLD of different series of ALTER like Acex, Apex,Flex, Max, are supported.
• Supports up to a maximum  of 160K gate density.
• Downloading through parallel port of the PC.
• FPGA configuration facility through SPROM/FLASH-ROM.
• User selectable configuration modes using jumper settings.
• RS-232 serial interface facility with 9-pin D-type connector for communicating to the PC for UART applications.
• Dual line 16 characters LCD module interface.
• Provided 3X4 matrix key pad for loading numerical data.
• Provided 6 Nos of 7-segment LED displays for counting applications.
• Provide on-board 7 Nos LED for general purpose.
• Provided On – board buzzer for sound applications.
• Global reset switch.
• One 8 – input DIP switch provided for applying inputs.
• Facility to drive the device board through external clock frequency.
• All I/O lines (60) are taken out through FRC connectors.
• Power ON indication of multiple voltages through LEDs.
• Provided different programming methods for XILINX and ALTERA FPGAs.                                                                                                                                                 ACCESSORIES:                                                                                                      
• JTAG adapter with Cable and connecter set -1
• program examples and driver software CD -1
• User manual -1